Hi Jon,

Thanks! Yes, the GitHub repository is up to date for the new Edition. There are two branches in the repo, called “version1” and “version2”. I have pointed the master at “version2” but it should allow people to move between the two editions if required. If you can see “chp16” then you have the lastest version.

Kind regards, Derek.

The second edition of Exploring BeagleBone looks awesome and adding the PocketBeagle was quite timely since I have recently obtained one these. Thanks for sharing your knowledge of the BeagleBoards and for putting the time into creating the books.

Has the code listed on your GitHub repo for exploringBB been updated to reflect the new book?

I am wondering if you could explain how to use the code to change the SPI speed.

Thanks

Currently I am working on setting SPI on BBB and just followed the procedures on your book. After I typed the command of sudo sh -c “echo BB-SPIDEV0 > $SLOTS”, the terminal gave me :
debian@beaglebone:/lib/firmware$ sudo sh -c “echo BB-SPIDEV0 > $SLOTS”
[sudo] password for debian:

Message from syslogd@beaglebone at Jun 17 14:06:20 …
kernel:[ 786.178943] Internal error: Oops: 5 [#1] PREEMPT SMP ARM

Message from syslogd@beaglebone at Jun 17 14:06:20 …
kernel:[ 786.280549] Process sh (pid: 1060, stack limit = 0xdc550218)

Message from syslogd@beaglebone at Jun 17 14:06:20 …
kernel:[ 786.286234] Stack: (0xdc551d58 to 0xdc552000)

Message from syslogd@beaglebone at Jun 17 14:06:20 …
kernel:[ 786.290611] 1d40: 00000000 014000c0

Message from syslogd@beaglebone at Jun 17 14:06:20 …
kernel:[ 786.298829] 1d60: 00000000 20030013 dc551dd4 dc551d78 c0dc34cc db64e784 c15d9ab0 db64e7a0

After this, if I cat $SLOTS, I got:
0: PF—- -1
1: PF—- -1
2: PF—- -1
3: PF—- -1
4: P-O— -1 Override Board Name,00A0,Override Manuf,BB-SPIDEV0

However, when I go to /dev, there is no file named spidev1.0 or spidev1.1

I am kind of stuck at this point and pretty confused what is going on.

I will really appreciate if this comment get replied!

Sincerely
Jinao Gao

thanking you

Plz suggest solution for this error

I have the same problem. Did you find a solution?

I am having the following error when I try to git clone in my new beaglebone blue.

“Failed to connect to github.com port 443: Connection refused”

I am also unable to “sudo apt-get update” and it gives also connection refused on same port.

I have shared my internet (both ethernet and wifi) and run /sbin/route add default gw 192.168.7.1 and I am able to ping 8.8.8.8 and http://www.google.com, but for some reason I can’t update or clone.

Any ideas? I’ve read it might be an internet connection but I am lost here. I could really use some help.

I am on Windows 10 64 bit and have installed drivers.

Thanks in advance.

Really impressed by this excellent resource and and thanks for all this information. Thanks to your hard work I am using the Beaglebone on a flight prototype at work!

Question regarding the PRUADC.p code from chapter 13.

When I scope the pin P8_46 pin toggled in the PRUCLOCK.p (listing 13.A2) code with a logic analyzer I get a very clean 100 kHz clock pulse. In PRUADC.p (listing 13.A4) I introduced pin P8_11 (pr1_pru0__pru_r30_15) in the SPICLK function to see what the SPI CLOCK signal would be like on the scope. I got inconsistent pulse frequency (as if the pulses were sometimes split) and not sure why.

In my overlay I define P8_11 as: 0x034 0x06

I toggle the pin in this snippet:

SPICLK:
MOV r0, TIME_CLOCK // time for clock low — assuming clock low before cycle
CLKLOW:
SUB r0, r0, 1 // decrement the counter by 1 and loop (next line)
QBNE CLKLOW, r0, 0 // check if the count is still low
QBBC DATALOW, r2.t31 // The write state needs to be set right here — bit 31 shifted left
SET r30.t1
QBA DATACONTD
DATALOW:
CLR r30.t1
DATACONTD:
SET r30.t2 // set the clock high
SET r30.t15 // SETTING P8_11 TO VIEW SCLK SIGNAL
MOV r0, TIME_CLOCK // time for clock high
CLKHIGH:
SUB r0, r0, 1 // decrement the counter by 1 and loop (next line)
QBNE CLKHIGH, r0, 0 // check the count
LSL r2, r2, 1
// clock goes low now — read the response on MISO
CLR r30.t2 // set the clock low
CLR r30.t15 // CLEAR P8_11 TO VIEW SCLK SIGNAL
QBBC DATAINLOW, r31.t3
OR r3, r3, 0x00000001
DATAINLOW:
LSL r3, r3, 1
RET

Why is TIME_CLOCK defined as 12 (at the top of PRUADC.p file)?

At this point I am not sure whether the inconsistent spi clock is caused by me or the code needs to be fixed.

Please let me know what you think.

Thank you,

Bolek